A high speed and area efficient on-chip analog waveform extractor

Author

Hajjar, Ara ; Roberts, Gordon W.

Author_Institution

Microelectron. & Comput. Syst. Lab., McGill Univ., Montreal, Que., Canada

fYear

1998

fDate

18-23 Oct 1998

Firstpage

688

Lastpage

697

Abstract

A multiple pass A/D conversion technique is proposed for mixed-signal test applications. Only a single on-chip comparator and sample-and-hold circuit is required to digitize repetitive analog waveforms. Simulations show 10 bits of amplitude resolution at 300 MHz for a bipolar comparator design (0.8 μm BiCMOS process), and 10 bits of amplitude resolution at 667 MHz for a CMOS comparator design (0.5 μm CMOS process). A prototype IC designed for a 0.5 μm CMOS process has been sent for fabrication. Experimental results from a prototype board (implemented with discrete components) are given

Keywords

BiCMOS integrated circuits; CMOS integrated circuits; analogue-digital conversion; automatic testing; boundary scan testing; comparators (circuits); design for testability; integrated circuit testing; mixed analogue-digital integrated circuits; sample and hold circuits; wave analysers; 0.5 micron; 0.8 micron; 300 MHz; 667 MHz; CMOS comparator design; DFT; HSPICE models; amplitude resolution; area efficient; bipolar comparator design; high speed; mixed-signal test; multiple pass A/D conversion technique; on-chip analog waveform extractor; optimal method selection; prototype IC; prototype board; repetitive analog waveforms; sample-and-hold circuit; single on-chip comparator; CMOS process; Circuit simulation; Circuit testing; Converters; Design engineering; Integrated circuit measurements; Microelectronics; Prototypes; Sampling methods; System testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1998. Proceedings., International

Conference_Location

Washington, DC

ISSN

1089-3539

Print_ISBN

0-7803-5093-6

Type

conf

DOI

10.1109/TEST.1998.743213

Filename

743213