OxRAM-based pulsed latch for non-volatile flip-flop in 28nm FDSOI

Emerging connected devices operating on battery or harvested energy sources highlight the need for ultra-low standby power design. Including non-volatility in flip-flops (FF) allows nullifying the power consumption in sleep mode, while maintaining the system state. Most of the reported solutions require FF modifications while increasing their complexity. This paper presents a non-volatile flip-flop (NVFF) designed as an OxRAM-based pulsed latch tied to a regular FF for ultra-wide voltage range applications. In 28nm CMOS FDSOI, adding non-volatility cut-off the FF leakage at the cost of 63pJ of data store and restore energy and less than 15% of delay penalty.