DocumentCode :
2525763
Title :
Dynamic performance and leakage current characteristics of 1/4-micron-gate ultra-thin CMOS/SIMOX gate array
Author :
Kado, Y. ; Ohno, T. ; Sakakibara, Y. ; Kawai, Y. ; Yamamoto, E. ; Ohtaka, A. ; Tsuchiya, T.
Author_Institution :
NTT LSI Labs., Kanagawa, Japan
fYear :
1994
fDate :
11-14 Dec. 1994
Firstpage :
665
Lastpage :
668
Abstract :
Dynamic performance and leakage current characteristics of fully-depleted quarter-micron-gate CMOS/SIMOX devices are examined using a new test structure built on a 1.4-/spl mu/m-pitch gate array. High speed and low power characteristics of various loaded CMOS/SIMOX logic gates have been verified with the test structure. Furthermore, we have found that the NMOS subthreshold leakage current due to the parasitic bipolar action varies with the off-state period of input pulses during switching operation.<>
Keywords :
CMOS integrated circuits; SIMOX; leakage currents; logic arrays; logic gates; 0.25 micron; 1/4-micron-gate ultra-thin CMOS/SIMOX gate array; NMOS subthreshold leakage current; dynamic performance; fully-depleted quarter-micron-gate CMOS/SIMOX devices; leakage current characteristics; logic gates; parasitic bipolar action; switching operation; CMOS logic circuits; Frequency; Leakage current; Logic devices; Logic gates; Logic testing; MOS devices; MOSFETs; Parasitic capacitance; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1994. IEDM '94. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
ISSN :
0163-1918
Print_ISBN :
0-7803-2111-1
Type :
conf
DOI :
10.1109/IEDM.1994.383322
Filename :
383322
Link To Document :
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