Title :
Characteristics of CMOS devices fabricated using high quality thin PECVD gate oxide
Author :
Wang, L.K. ; Wen, D.S. ; Bright, A.A. ; Nguyen, T.N. ; Chang, W.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
n- and p-channel FETs at 0.25- mu m channel length are fabricated utilizing very thin (35-70 AA) PECVD (plasma-enhanced chemical-vapor-deposited) oxide as the gate dielectric. This oxide can be deposited at very low substrate temperature (>
Keywords :
CMOS integrated circuits; dielectric thin films; electric breakdown of solids; insulated gate field effect transistors; plasma CVD; silicon compounds; surface treatment; 0.25 micron; 35 to 70 AA; 350 degC; CMOS devices; He plasma treatment; PECVD gate oxide; Si-SiO/sub 2/; SiO/sub 2/; breakdown characteristics; channel length; deep submicron devices; device characteristics; device transconductances; gate dielectric; low substrate temperature; n-channel FETs; oxide charge characteristics; oxide deposition; p-channel FETs; plasma-enhanced chemical vapour deposition; surface roughness; surface state induced mobility degradation; thermally grown gate oxide; Dielectric substrates; FETs; Plasma chemistry; Plasma devices; Plasma measurements; Plasma properties; Plasma temperature; Rough surfaces; Surface roughness; Surface treatment;
Conference_Titel :
Electron Devices Meeting, 1989. IEDM '89. Technical Digest., International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-0817-4
DOI :
10.1109/IEDM.1989.74322
