• DocumentCode
    2525796
  • Title

    A new approach to implement 0.1 /spl mu/m MOSFET on thin-film SOI substrate with self-aligned source-body contact

  • Author

    Chen, V.M.C. ; Woo, J.C.S.

  • Author_Institution
    Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
  • fYear
    1994
  • fDate
    11-14 Dec. 1994
  • Firstpage
    657
  • Lastpage
    660
  • Abstract
    An alternative approach was used to optimize SOI MOSFET for subquarter micron channel length. It involves a direct transfer of the optimized bulk Si structure to SOI substrate with film thickness of /spl ges/100 nm. Since the device is operating in non-fully depleted mode, floating body effect has to be eliminated. This is accomplished through a novel self-aligned asymmetric source-body contact in which the current conducts through tunneling. Test structures have been fabricated and good electrical results were obtained.<>
  • Keywords
    MOSFET; silicon-on-insulator; substrates; thin film devices; tunnelling; 0.1 micron; MOSFET; depleted mode; floating body effect; self-aligned asymmetric source-body contact; self-aligned source-body contact; subquarter micron channel length; thin-film SOI substrate; tunneling; Boron; Doping; FETs; Fabrication; Implants; MOSFET circuits; Substrates; Testing; Transistors; Tunneling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 1994. IEDM '94. Technical Digest., International
  • Conference_Location
    San Francisco, CA, USA
  • ISSN
    0163-1918
  • Print_ISBN
    0-7803-2111-1
  • Type

    conf

  • DOI
    10.1109/IEDM.1994.383324
  • Filename
    383324