• DocumentCode
    2525858
  • Title

    A CMOS 8-bit 20MHz two-step parallel A/D converter with 95mW power consumption

  • Author

    Fukushima, N. ; Kumazawa, N. ; Soneda, M. ; Yamada, T.

  • Author_Institution
    Sony Corp., Kanagawa, Japan
  • fYear
    1988
  • fDate
    8-10 June 1988
  • Firstpage
    238
  • Lastpage
    239
  • Abstract
    The need for a low-cost, high-speed A/D converter with low power consumption is growing as digital video-signal processing applications in the consumer electronics field increase. Although a flash ADC offers a sufficiently high conversion rate for video applications, it has a high power consumption because of its large number of comparators. The two-step parallel ADC, on the other hand, has significantly fewer comparators, and thus a lower power consumption and, because its chip size is smaller, it can be made at lower cost. A conventional two-step parallel ADC has, however, three problems: a relatively slow conversion rate, a relatively poor differential linearity, and the need for a peripheral sample-and-hold circuit. The authors report a new 8-bit two-step parallel ADC which solves these problems.<>
  • Keywords
    CMOS integrated circuits; analogue-digital conversion; comparators (circuits); computerised signal processing; digital signal processing chips; video signals; 20 MHz; 8 bit; 95 mW; CMOS; consumer electronics; digital video-signal processing; flash ADC; power consumption; two-step parallel A/D converter; CMOS process; Circuits; Energy consumption; Error correction; Latches; Linearity; Pipeline processing; Switches; Timing; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Consumer Electronics, 1988. Digest of Technical Papers. ICCE., IEEE 1988 International Conference on
  • Conference_Location
    Rosemount, IL, USA
  • Type

    conf

  • DOI
    10.1109/ICCE.1988.10778
  • Filename
    10778