Title :
Ultrahigh speed transceiver package with stacked silicon integration technology
Author_Institution :
Xilinx, Inc., San Jose, CA, USA
Abstract :
As carrier frequency going into millimeter wave domain, today´s semiconductor IC package enters a domain where many challenges become fundamental to legacy technology and design practice. In this study, we analyze interconnect impairment for ultrahigh speed transceivers. To answer the challenge towards 56Gbps, we assess system compensation schemes from silicon equalization to passive interconnect innovations. The author will specifically address recent advancement in stacked silicon integration technology (SSIT) and its role in 400G/1TB system solutions.
Keywords :
integrated circuit interconnections; integrated circuit packaging; silicon; transceivers; SSIT; carrier frequency; interconnect impairment; millimeter wave domain; passive interconnect innovation; semiconductor IC package; silicon equalization; stacked silicon integration technology; system compensation scheme; ultrahigh speed transceiver package; Dielectric losses; Metals; Silicon; Substrates; Through-silicon vias; Transceivers;
Conference_Titel :
Electronics Packaging Technology Conference (EPTC), 2014 IEEE 16th
Conference_Location :
Singapore
DOI :
10.1109/EPTC.2014.7028265
