• DocumentCode
    252650
  • Title

    Innovative wafer level package manufacturing with FlexLineTM

  • Author

    Kang Chen ; Kok Hwa Lim ; Seah, K. ; Yaojian Lin ; Seung Wook Yoon

  • Author_Institution
    STATS ChipPAC Ltd., Singapore, Singapore
  • fYear
    2014
  • fDate
    3-5 Dec. 2014
  • Firstpage
    11
  • Lastpage
    15
  • Abstract
    The demand for Wafer Level Chip Scale Packages (WLCSP) has experienced tremendous growth due to the surge in demand for advanced mobile products. The increased demand is seen for both 200mm wafers and 300mm wafers, however a significant segment of the market continues to be driven by 200mm designs. The infrastructure capacity supporting 200mm WLCSP has been stressed as a result of the mature status of 200mm technology and the rate of conversion of alternative package formats to WLCSP. This creates a dilemma for WLP service providers because adding 200mm capacity continues to require a significant amount of capital. Since 200mm volumes will most likely decline within the next 5 years, it is difficult to justify the use of capital when the depreciation term is longer than the anticipated life cycle of the product. This paper introduces a new encapsulated WLCSP product (eWLCSP™) and innovative manufacturing known as FlexLineTM. The new product has a thin protective coating applied to all exposed silicon surfaces on the die. The applied coating protects the silicon and fragile dielectrics and prevents handling damage during dicing and assembly operations, effectively providing a durable packaged part in the form factor of a WLCSP. The manufacturing process leverages existing high volume manufacturing methods with exceptionally high process yields. In this process the silicon wafer is diced prior to the wafer level packaging process. The dice are then reconstituted into a new wafer form with adequate distance between the die to allow for a thin layer of protective coating to remain after final singulation. Standard methods are used to apply dielectrics, thin film metals, and solder bumps. The resulting structure is identical to a conventional WLCSP product with the addition of the protective sidewall coating. This paper discusses the key attributes of the new package as well as the manufacturing process used to create it. Reliability data will be pres- nted and compared to conventional WLCSP products and improvements in package reliability and performance will be discussed and compared to conventional WLCSP.
  • Keywords
    integrated circuit manufacture; protective coatings; solders; thin film devices; wafer level packaging; FlexLine; WLP service providers; advanced mobile products; assembly operations; dicing operations; eWLCSPTM; encapsulated WLCSP product; fragile dielectrics; high volume manufacturing methods; infrastructure capacity; innovative wafer level package manufacturing; protective sidewall coating; silicon dielectrics; solder bumps; thin film metals; wafer level chip scale packages; Assembly; Coatings; Reliability; Silicon; Surface treatment; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Packaging Technology Conference (EPTC), 2014 IEEE 16th
  • Conference_Location
    Singapore
  • Type

    conf

  • DOI
    10.1109/EPTC.2014.7028268
  • Filename
    7028268