Design of a folded-patch chip-size antenna for short-range communications

Author

Mendes, P.M. ; Polyakov, A. ; Bartek, M. ; Burghartz, Joachim N. ; Correia, J.H.

Author_Institution

Dept. of Ind. Electron., Minho Univ., Portugal

Volume

2

fYear

2003

fDate

7-9 Oct. 2003

Firstpage

723

Abstract

We report on design of an integrated folded shorted-patch (FSP) chip-size antenna for operation at 5.7 GHz and use in short-range wireless communications. Application of wafer-level chip-scale packaging (WLCSP) techniques like adhesive wafer bonding and through-wafer electrical via formation, combined with the selected antenna type allows antenna on-chip integration. The operating characteristics of a folded S-P antenna built on two stacked glass substrates were analysed with respect to substrate thickness, middle patch length and substrate sidewall angles. Antenna size reduction down to 4x4x1 mm³, efficiency of 66% and bandwidth of 62 MHz are predicted.

Keywords

antennas; chip scale packaging; integrated circuit design; wafer bonding; wafer-scale integration; 5.7 GHz; 62 MHz; 66 percent; FSP; WLCSP; adhesive wafer bonding; antenna on-chip integration; chip-size antenna; folded S-P antenna; folded-patch antenna; middle patch length; short-range communications; stacked glass substrates; substrate sidewall angles; substrate thickness; through-wafer electrical via formation; wafer-level chip-scale packaging; wireless communications; Chip scale packaging; Dielectric substrates; Fabrication; Glass; Patch antennas; Prototypes; Silicon; Wafer bonding; Wafer scale integration; Wireless communication;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Conference, 2003. 33rd European

Print_ISBN

1-58053-834-7

Type

conf

DOI

10.1109/EUMC.2003.1262992

Filename

1262992