Title :
Process integration technology for sub-30 ps ECL BiCMOS using heavily boron doped epitaxial contact (HYDEC)
Author :
Kinoshita, Y. ; Imai, K. ; Yoshida, H. ; Suzuki, H. ; Tatsumi, T. ; Yamazaki, T.
Author_Institution :
ULSI Device Dev. Lab., NEC Corp., Sagamihara, Japan
Abstract :
This paper presents a newly developed ECL BiCMOS process integration technology to achieve a sub-30 ps self-aligned bipolar transistor and a 0.25 /spl mu/m p/sup +n/sup +/ dual gate CMOS, by adding 4 more masking steps to those of a CMOS process. A heavily boron doped epitaxial contact (HYDEC) technology is introduced to reduce bipolar base resistance without boron penetration from p/sup +/ gate of pMOS through the thin gate oxide. Using this technology, integration of these CMOS with bipolar process is successfully realized without compromising each device performance.<>
Keywords :
BiCMOS digital integrated circuits; BiCMOS logic circuits; boron; emitter-coupled logic; heavily doped semiconductors; integrated circuit technology; ion implantation; semiconductor epitaxial layers; silicon; 0.25 micron; 30 ps; ECL BiCMOS; IC fabrication; Si:B; bipolar base resistance reduction; fabrication process; gate oxide; heavily B doped epitaxial contact; masking steps; p/sup +n/sup +/ dual gate CMOS; process integration technology; self-aligned bipolar transistor; BiCMOS integrated circuits; Bipolar transistors; Boron; CMOS process; CMOS technology; Electrodes; Epitaxial layers; Fabrication; Microelectronics; Ultra large scale integration;
Conference_Titel :
Electron Devices Meeting, 1994. IEDM '94. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-2111-1
DOI :
10.1109/IEDM.1994.383373
