Title :
Estimation of defect-free IDDQ in submicron circuits using switch level simulation
Author :
Maxwell, P.C. ; Rearick, J.R.
Author_Institution :
Integrated Circuits Bus. Div., Hewlett-Packard Co., USA
Abstract :
This paper presents a switch-level simulation-based method for estimating quiescent current values. The simulator identifies transistors that are in the proper state to experience leakage mechanisms. This information is combined with data about both the size of these transistors and various process parameters in order to calculate the actual IDDQ value. SPICE simulation results are presented on a variety of circuits to both calibrate the simulator, and to demonstrate state, time and sequence dependencies of circuits. Some preliminary results are also given for an actual production chip
Keywords :
CMOS integrated circuits; SPICE; VLSI; automatic testing; circuit simulation; integrated circuit testing; leakage currents; production testing; CMOS; SPICE simulation results; defect-free IDDQ; leakage mechanisms; process parameters; production chip; quiescent current values; sequence dependencies; submicron circuits; switch level simulation; CMOS process; Circuit simulation; Circuit testing; Companies; Geometry; Leakage current; Production; SPICE; Switches; Switching circuits;
Conference_Titel :
Test Conference, 1998. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-5093-6
DOI :
10.1109/TEST.1998.743278
