Power-gated FSM synthesis integrating partitioning and state assignment

Among the power-aware circuit synthesis techniques that have been proposed so far, power-gating has traditionally been the most effective way to lower power. In this approach, power reduction is achieved by shutting off the power supply to some portions of the logic block which are not active. So, we have to partition the design into two or more power islands. Suitable Finite State Machine partitioning and encoding reduces the power dissipation also in power-gating method. In this paper we have presented the state partitioning and state encoding strategy targeting low power Finite State Machine (FSM) decomposition based on Genetic Algorithmic approach. Our strategy has been validated using commercial FSM synthesis tool. All the previous works dealt with only FSM partitioning but did not consider state encoding together. This is the first ever approach considering FSM partitioning and state encoding together in power-gating technique. Experimental result shows that up to 78% power saving can be achieved.