DocumentCode
2528089
Title
On-chip versus off-chip test: an artificial dichotomy
Author
Aitken, Robert C.
Author_Institution
Hewlett-Packard Co., Palo Alto, CA, USA
fYear
1998
fDate
18-23 Oct 1998
Firstpage
1146
Abstract
There has been some recent interest in the subject of whether circuits should be tested with built-in self-test (BIST) or automated test equipment (ATE). As with many such debates, neither extreme is a viable position, and the true answer lies somewhere in the middle. BIST patterns have their place with scan patterns, IDDQ patterns, etc. as part of a test program driven by ATE
Keywords
application specific integrated circuits; automatic test pattern generation; boundary scan testing; built-in self test; fault diagnosis; integrated circuit testing; ATE driven test program; ATPG; IDDQ patterns; automated test equipment; built-in self-test; diagnosis capability; large ASIC design; multiple cores on chip; off-chip test; on-chip test; overall timing accuracy; scan patterns; system level integration test; Automatic testing; Built-in self-test; Circuit testing; Clocks; Costs; Semiconductor device measurement; Silicon; Test equipment; Timing; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1998. Proceedings., International
Conference_Location
Washington, DC
ISSN
1089-3539
Print_ISBN
0-7803-5093-6
Type
conf
DOI
10.1109/TEST.1998.743346
Filename
743346
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