Just how real is the SIA roadmap

Author

Needham, Wayne

Author_Institution

Intel Corp., Chandler, AZ, USA

fYear

1998

fDate

18-23 Oct 1998

Firstpage

1151

Abstract

We debate the potential rocks listed in the Test section of The National Technology Roadmap for Semiconductors 1997. The 1997 Test Roadmap changed dramatically the numbers presented in the 1994 Test Roadmap. We can still question the speeds, currents, DFT and pins in the Roadmap. At the same time, we question is it real and what is our future? What we need to think of as challenges is not the lines in the roadmap, but the directions, walls and methods to get around those lines. In much the same way as testers evolved from shared resource to per pin architecture, we need to adapt to the needs of the roadmap. Either find ways to achieve the timing, power, and costs or someone else will do it for us. That someone could be circuit design, process design or a completely new test paradigm

Keywords

automatic test equipment; automatic testing; electronics industry; integrated circuit testing; 1997 Test Roadmap; CMOS power; Moore´s law; National Technology Roadmap for Semiconductors; SIA roadmap; circuit design; costs; increased transistor density; new test paradigm; process design; roadmaps value; timing accuracy; Circuit testing; Electronics industry; Extrapolation; Industrial electronics; Lithography; Moore´s Law; Pins; Semiconductor device testing; Test equipment; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1998. Proceedings., International

Conference_Location

Washington, DC

ISSN

1089-3539

Print_ISBN

0-7803-5093-6

Type

conf

DOI

10.1109/TEST.1998.743350

Filename

743350