Magnetotransistors in SOI technology

Author

Castagnetti, R. ; Riccobene, C. ; Schneider, M. ; Wachutka, G. ; Baltes, H.

Author_Institution

Phys. Res. Lab., Eidgenossische Tech. Hochschule, Zurich, Switzerland

fYear

1994

fDate

11-14 Dec. 1994

Firstpage

147

Lastpage

150

Abstract

This paper reports on characterization and numerical modelling of dual-collector magnetotransistors with suppressed sidewall injection (SSIMT) fabricated in silicon on insulator (SOI) technology. This process allows to eliminate, by design, the undesirable high substrate current usually present in conventional bipolar or CMOS fabricated SSIMT´s. Two-dimensional simulations reveal that the device operates like a PIN diode rather than as a true transistor, as expected. The presence of an electron-hole plasma in the active device region inhibits a proper transistor behavior. The magnetic performance of the SSIMT is improved by reducing the minority carrier lifetime and by redefining the doping profiles of the process.<>

Keywords

bipolar transistors; carrier lifetime; doping profiles; electric sensing devices; magnetic sensors; minority carriers; semiconductor device models; semiconductor plasma; silicon-on-insulator; simulation; 2D simulations; SOI technology; Si; characterization; doping profiles; dual-collector magnetotransistors; electron-hole plasma; minority carrier lifetime; numerical modelling; suppressed sidewall injection; CMOS process; CMOS technology; Etching; Isolation technology; Laboratories; Magnetic fields; Numerical models; Semiconductor device modeling; Silicon on insulator technology; Wafer bonding;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1994. IEDM '94. Technical Digest., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Print_ISBN

0-7803-2111-1

Type

conf

DOI

10.1109/IEDM.1994.383443

Filename

383443