• DocumentCode
    2528288
  • Title

    The stuck-at fault: it ain´t over ´til it´s over

  • Author

    Butler, Kenneth M.

  • Author_Institution
    Texas Instrum. Inc., Dallas, TX, USA
  • fYear
    1998
  • fDate
    18-23 Oct 1998
  • Firstpage
    1165
  • Abstract
    The stuck-at fault has weathered at least two major revolutions in the manufacture of electronic components, the transition from tubes to solid state, and the move from bipolar to MOS technologies. It has been applied successfully in all three domains. It seems unlikely that future digital technologies will invalidate the use of the model. In conclusion, as long as the stuck-at fault model remains useful, it should not be abandoned in favour of other defect models. Investigations into new models and test techniques should continue, with the idea that they will probably be used to complement existing stuck-at-based methodologies
  • Keywords
    automatic test pattern generation; fault simulation; integrated circuit testing; logic testing; ATPG; automated diagnosis; bridging defect; model value; modelling simplicity; stuck-at fault model; test effectiveness; CMOS integrated circuits; CMOS technology; Fault detection; Fault diagnosis; Instruments; Integrated circuit modeling; Integrated circuit testing; Isolation technology; Manufacturing; Semiconductor device modeling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 1998. Proceedings., International
  • Conference_Location
    Washington, DC
  • ISSN
    1089-3539
  • Print_ISBN
    0-7803-5093-6
  • Type

    conf

  • DOI
    10.1109/TEST.1998.743357
  • Filename
    743357