Buying time for the stuck-at fault model

As ATPG algorithms become more efficient at minimizing the number of patterns required to detect SSA faults, dependence on incidental detections of nontarget static defects will become increasingly less prudent. Even more importantly, tests for delay defects require at-speed clocks and are absolutely not covered by static SSA tests, even incidentally and it is expected that delay defects will become increasingly common in synthesized circuits. Interestingly, the SSA fault model, with only minor extensions, can still serve as the foundation for ATPG and fault simulation tools for these more detailed fault models. Additional constraints can be placed on these tools to force them to meet the extra excitation requirements (like forcing values on the two nodes at a bridging site, or clocking two opposite values at speed through a delay fault site), while still maintaining the relative computational tractability associated with the SSA model. To that extent, future test advances may be a matter of “buying time” for the SSA model