DocumentCode :
2528376
Title :
Current signatures: application [to CMOS]
Author :
Gattiker, Anne E. ; Maly, Wojciech
Author_Institution :
Carnegie Mellon Univ., Pittsburgh, PA, USA
fYear :
1998
fDate :
18-23 Oct 1998
Firstpage :
1168
Lastpage :
1177
Abstract :
Analysis of IC technology trends indicates that Iddq testing may be approaching its limits of applicability. The new concept of the current signature may expand this limit under the condition that an appropriate current-signature-based test methodology is developed. This paper is a first step toward such a goal. It is focused on current signature step detection in a noisy test environment. Application of current signatures in die selection and defect diagnosis is discussed as well
Keywords :
CMOS digital integrated circuits; automatic testing; fault diagnosis; integrated circuit testing; logic testing; CMOS; IC technology trends; current signature; defect diagnosis; die selection; noisy test environment; step detection; test methodology; Costs; Current measurement; Frequency; Integrated circuit noise; Integrated circuit testing; Life testing; Noise measurement; Transistors; Voltage; Working environment noise;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 1998. Proceedings., International
Conference_Location :
Washington, DC
ISSN :
1089-3539
Print_ISBN :
0-7803-5093-6
Type :
conf
DOI :
10.1109/TEST.1998.743360
Filename :
743360
Link To Document :
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