Title :
Design methodology for low-voltage MOSFETs
Author :
Andoh, T. ; Furukawa, A. ; Kunio, T.
Author_Institution :
Mictroelectron. Res. Labs., NEC Corp., Kanagawa, Japan
Abstract :
A design method for low-voltage MOSFETs with low threshold voltage (V/sub th/) is discussed. It is found that an epitaxial channel and forward substrate voltage (forward V/sub sub/) are effective to reduce V/sub th/ without an increase in short channel effect, while stand-by power associated with low V/sub th/ can be effectively reduced with a new operation scheme based on dynamic forward V/sub sub/ biasing.<>
Keywords :
MOS integrated circuits; MOSFET; integrated circuit design; LV operation; design method; dynamic forward biasing; epitaxial channel; forward substrate voltage; low threshold voltage; low-voltage MOSFETs; stand-by power; CMOS technology; Design methodology; Impurities; Laboratories; Leakage current; MOSFETs; Microelectronics; National electric code; Substrates; Threshold voltage;
Conference_Titel :
Electron Devices Meeting, 1994. IEDM '94. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-2111-1
DOI :
10.1109/IEDM.1994.383462
