DocumentCode
2529071
Title
Through-Silicon-Via resistive-open defect analysis
Author
Metzler, C. ; Todri, A. ; Bosio, A. ; Dilillo, L. ; Girard, P. ; Virazel, A.
Author_Institution
LIRMM, Univ. of Montpellier 2, Montpellier, France
fYear
2012
fDate
28-31 May 2012
Firstpage
1
Lastpage
1
Abstract
Three-dimensional (3D) integration is a fast emerging technology that offers integration of high density, fast performance and heterogeneous circuits in a small footprint. Through-Silicon-Vias (TSVs) enable 3D integration by providing fast performance and short interconnects among tiers. However, they are also susceptible to defects that occur during manufacturing steps and cause crucial reliability issues. In this paper, we perform an analysis of resistive-open defects (ROD) on TSVs considering coupling effects (i.e. inductive and capacitive) and a wide frequency spectrum. Our experiments show that both substrate coupling and switching frequency can have a significant impact on weak open TSV behavior.
Keywords
integrated circuit interconnections; integrated circuit reliability; three-dimensional integrated circuits; 3D integration; TSV ROD analysis; manufacturing steps; reliability issues; short interconnects; three-dimensional integration; through-silicon-via resistive-open defect analysis; wide frequency spectrum; Couplings; Delay; Integrated circuit interconnections; Integrated circuit modeling; Substrates; Through-silicon vias; 3D integration; TSVs; failure analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium (ETS), 2012 17th IEEE European
Conference_Location
Annecy
Print_ISBN
978-1-4673-0696-6
Electronic_ISBN
978-1-4673-0695-9
Type
conf
DOI
10.1109/ETS.2012.6233037
Filename
6233037
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