Novel spray coating process with polymer material applied in CIS wafer-level-packaging

This paper studies a creative spray coating process applied to the forming of sidewall insulation of through silicon via (TSV) in CMOS image sensor (CIS) packaging. In this paper, through controlling the nitrogen gas pressure, rate of polymer solution flow and plate temperature, we present a low-temperature-first and high-temperature-last spray coating method. Using this novel spray coating process, one kind of phenolic aldehyde polymer is deposited on the sidewall of though silicon via with the diameter of 65μm and depth of 120μm. To promote the performance of TSV sidewall insulation and electrical interconnection characteristic, the thickness of polymer on the sidewall was aimed to not less than 2μm. The temperature of spray coating process was adjusted to control the viscosity of polymer to achieve the insulation layer thickness target value. Finally, we fabricate the adequate polymer insulation layers in the certain aspect ratio (2:1) TSV structure successfully.