DocumentCode :
2529352
Title :
Re-using chip level DFT at board level
Author :
Gu, Xinli ; Rearick, Jeff ; Eklow, Bill ; Keim, Martin ; Qian, Jun ; Jutman, Artur ; Chakrabarty, Krishnendu ; Larsson, Erik
fYear :
2012
fDate :
28-31 May 2012
Firstpage :
1
Lastpage :
1
Abstract :
As chips are getting increasingly complex, there is no surprise to find more and more built-in DFX. This built-in DFT is obviously beneficial for chip/silicon DFX engineers; however, board/system level DFX engineers often have limited access to the build in DFX features. There is currently an increasing demand from board/system level DFX engineers to reuse chip/silicon DFX at board/system level. This special session will discuss: What chip access is needed for board-level for test and diagnosis? How to accomplish the access? Will IEEE P1687 and IEEE 1149.1 solve these problems?
Keywords :
design for testability; elemental semiconductors; microprocessor chips; printed circuit testing; silicon; IEEE 1149.1; IEEE P1687; Si; board-level diagnosis; board-level test; board/system level; built-in DFT; built-in DFX; chip/silicon DFX engineers; re-using chip level DFT; Discrete Fourier transforms; Educational institutions; Electronic mail; Graphics; IP networks; Standards; USA Councils; Board test; IEEE 1149.1; IEEE P1687; board diagnosis; chip access;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium (ETS), 2012 17th IEEE European
Conference_Location :
Annecy
Print_ISBN :
978-1-4673-0696-6
Electronic_ISBN :
978-1-4673-0695-9
Type :
conf
DOI :
10.1109/ETS.2012.6233049
Filename :
6233049
Link To Document :
بازگشت