• DocumentCode
    2529919
  • Title

    Register-transfer level simulation

  • Author

    Braunl, Thomas

  • Author_Institution
    Centre for Intelligent Inf. Process. Syst., Western Australia Univ., Nedlands, WA, Australia
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    392
  • Lastpage
    396
  • Abstract
    We present the tool Retro (Register-Transfer Object Hardware Simulator) for simulating digital hardware systems at register-transfer level. The tool has been implemented in Java and is used for educational purposes. It provides simulation primitives for combinatorial gates, multiplexers, function units, clocks, registers, memory and I/O units. A system is constructed by picking and placing components from the menu to the canvas and interconnecting them. Simulation is then performed either in a stepwise or continuous fashion. Simulated circuits can be either synchronous or asynchronous and can range from simple examples to complete CPUs with programs in ROM and data in RAM
  • Keywords
    Java; logic CAD; logic simulation; Java; RAM; ROM; Retro; clocks; combinatorial gates; digital hardware systems; educational purposes; function units; multiplexers; register-transfer level simulation; register-transfer object hardware simulator; registers; simulation primitives; Central Processing Unit; Circuit simulation; Clocks; Displays; Hardware; Java; Libraries; Random access memory; Registers; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Modeling, Analysis and Simulation of Computer and Telecommunication Systems, 2000. Proceedings. 8th International Symposium on
  • Conference_Location
    San Francisco, CA
  • ISSN
    1526-7539
  • Print_ISBN
    0-7695-0728-X
  • Type

    conf

  • DOI
    10.1109/MASCOT.2000.876563
  • Filename
    876563