DocumentCode
253040
Title
Design of low power current starved VCO with improved frequency stability
Author
Jagtap, R.R. ; Pable, S.D.
Author_Institution
Dept. of Electron. & Telecommun. Eng., Univ. of Pune, Pune, India
fYear
2014
fDate
9-11 May 2014
Firstpage
1
Lastpage
5
Abstract
Voltage Controlled Oscillator (VCO) plays a vital role in deciding the performance of VLSI circuits. Lot of research work is carried out on VCO from the past decades to achieve higher frequency, low power, low operating voltage, lower phase noise, and to increase tuning range. This paper mainly explores design of current starved voltage controlled ring oscillator for ultra low power applications. The performance comparison is done with respect to frequency stability and power consumption characteristics at 32nm technology node. Proposed C.S.D.T connection of VCO shows 48% higher speed at the cost of 18.9% increased power consumption over conventional VCO at VDD = 0.4V. Furthermore, this paper explores effect of temperature variations on VCO performance. Proposed VCO shows less sensitivity to temperature variation over conventional VCO.
Keywords
VLSI; frequency stability; integrated circuit design; low-power electronics; power consumption; voltage-controlled oscillators; C.S.D.T connection; VLSI circuits; current starved VCO design; frequency stability improvement; power consumption characteristics; size 32 nm; temperature variation; tuning range; ultra low power applications; voltage 0.4 V; voltage controlled ring oscillator; Digital TV; Gold; Very large scale integration; Voltage-controlled oscillators; C.S.DT VCO; Current starved; DTMOS;
fLanguage
English
Publisher
ieee
Conference_Titel
Recent Advances and Innovations in Engineering (ICRAIE), 2014
Conference_Location
Jaipur
Print_ISBN
978-1-4799-4041-7
Type
conf
DOI
10.1109/ICRAIE.2014.6909152
Filename
6909152
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