DocumentCode
2531745
Title
High dielectric LDD spacer technology for high performance MOSFET using gate-fringing field effects
Author
Mizuno, T. ; Kobori, T. ; Saitoh, Y. ; Sawada, S. ; Tanaka, T.
Author_Institution
Toshiba Corp., Kawasaki, Japan
fYear
1989
fDate
3-6 Dec. 1989
Firstpage
613
Lastpage
616
Abstract
A MOSFET with high-dielectric LDD (lightly doped drain) spacer material (HLDD) was investigated. As the dielectric constant of the LDD spacer becomes higher, the gate-fringing field increases, resulting in drain field reduction. Therefore, low impact ionization in HLDD can be achieved. Moreover, high transconductance can be realized in the HLDD due to small source parasitic resistance in the HLDD caused by the large gate-fringing field effects. It is also shown that gate-fringing field effects have a considerable influence on the LDD MOSFET performance in scaling down the transistor´s dimensions.<>
Keywords
MOS integrated circuits; insulated gate field effect transistors; integrated circuit technology; MOSFET; MOSIC; drain field reduction; gate-fringing field effects; high dielectric LDD spacer material; high transconductance; lightly doped drain; low impact ionization; scaling; source parasitic resistance; Dielectric constant; Dielectric materials; Dielectric substrates; Hot carrier effects; Impact ionization; Laboratories; MOSFET circuits; Microelectronics; Semiconductor devices; Space technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1989. IEDM '89. Technical Digest., International
Conference_Location
Washington, DC, USA
ISSN
0163-1918
Print_ISBN
0-7803-0817-4
Type
conf
DOI
10.1109/IEDM.1989.74355
Filename
74355
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