Title :
Automated design and layout generation for switched current circuits
Author :
Sniatala, Pawel ; Rudnicki, Radostaw
Author_Institution :
Poznan Univ. of Technol.
Abstract :
Recent advances in VLSI technology in combinations with economical motivations results in drive to integrate the complete signal processing chain on a single ASIC or SOC. However, the luck of supporting CAD tools for the synthesis and layout generation of the analog blocks is the major bottleneck in the design of modern mixed signal VLSI circuits. The paper presents original methods and their implementation for automated design of the switched current (SI) blocks. The design flow includes programs for SI circuits synthesis and automated layout generation. As an example a design of current mirrors for SI filters is presented
Keywords :
VLSI; current mirrors; mixed analogue-digital integrated circuits; network synthesis; switched current circuits; switched filters; system-on-chip; ASIC; CAD tools; SI filters; SOC; analog blocks; automated layout generation; circuits synthesis; current mirrors; mixed signal VLSI circuits; signal processing chain; switched current circuits; Application specific integrated circuits; Circuit synthesis; Design automation; Mirrors; Signal design; Signal generators; Signal processing; Signal synthesis; Switching circuits; Very large scale integration;
Conference_Titel :
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location :
Island of Kos
Print_ISBN :
0-7803-9389-9
DOI :
10.1109/ISCAS.2006.1692666
