DocumentCode
2532341
Title
Delay uncertainty due to supply variations in static and dynamic full adders
Author
Alioto, Massimo ; Palumbo, Gaetano
Author_Institution
Dipt. di Ingegneria dell ´´Informazione, Universita di Siena
fYear
2006
fDate
21-24 May 2006
Lastpage
770
Abstract
In this paper, the delay uncertainty due to supply variations is investigated for two important full adder topologies. In particular, it is developed an analytical model of the delay sensitivity to supply variations for the static mirror adder and the dynamic dual-rail domino adder. The model is general and very simple, and allows for identifying the main parameters which define the delay uncertainty due to supply variations, as well as deriving design considerations. In particular, the importance of the input rise/fall time variations is clarified, and the effect of the supply voltage reduction and technology scaling is discussed. Results are validated through SPICE simulations with a 0.18-mum and a 0.35-mum technology
Keywords
adders; delays; 0.18 micron; 0.35 micron; SPICE simulations; delay uncertainty; dynamic dual-rail Domino adder; static mirror adder; supply variations; Added delay; Adders; Analytical models; Circuits; Degradation; Delay effects; Semiconductor device modeling; Uncertainty; Very large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location
Island of Kos
Print_ISBN
0-7803-9389-9
Type
conf
DOI
10.1109/ISCAS.2006.1692698
Filename
1692698
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