DocumentCode :
2533004
Title :
Execution time comparison of lifting-based 2D wavelet transforms implementations on a VLIW DSP
Author :
Masselos, Konstantinos ; Andreopoulos, Yiannis ; Stouraitis, Thanos
Author_Institution :
Dept. of Electr. & Electron. Eng., Imperial Coll. of Sci. Technol. & Medicine, London
fYear :
2006
fDate :
21-24 May 2006
Lastpage :
926
Abstract :
Several input-traversal schedules have been proposed for the computation of the 2D discrete wavelet transform (DWT). In this paper, the row-column, the line-based and the block-based schedules for the 2D DWT computation are compared with respect to their execution time on a very long instruction word (VLIW) digital signal processor (DSP). Implementations of the wavelet transform according to the considered schedules have been developed. They are parameterized with respect to filter pair, image size, and number of decomposition levels. All implementations have been mapped on a VLIW DSP. Performance metrics for the implementations for a complete set of parameters have been obtained and compared. The experimental results show that each implementation performs better for different points of the parameter space
Keywords :
digital signal processing chips; discrete wavelet transforms; image processing; multidimensional signal processing; scheduling; 2D DWT computation; 2D discrete wavelet transform; VLIW DSP; digital signal processor; execution time comparison; very long instruction word; Application specific integrated circuits; Digital signal processing; Digital signal processors; Discrete wavelet transforms; Processor scheduling; Signal processing; Signal processing algorithms; VLIW; Wavelet analysis; Wavelet transforms;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location :
Island of Kos
Print_ISBN :
0-7803-9389-9
Type :
conf
DOI :
10.1109/ISCAS.2006.1692737
Filename :
1692737
Link To Document :
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