• DocumentCode
    2533010
  • Title

    Dynamic path-based branch correlation

  • Author

    Nair, Ravi

  • Author_Institution
    IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
  • fYear
    1995
  • fDate
    29 Nov-1 Dec 1995
  • Firstpage
    15
  • Lastpage
    23
  • Abstract
    Misprediction of conditional branches is a major cause for reduced performance in processor implementations with large numbers of functional units. We present a hardware scheme which records the path leading to a conditional branch in order to predict the outcome of the branch instruction more accurately. The proposed scheme is analyzed using instruction traces from integer benchmark programs. The results indicate that knowledge of path information leads to better prediction than knowledge of simply the previous branch outcomes for a given number of history items. The results further show that even for equivalent hardware cost, path-based correlation often outperforms patient-based correlation, especially when history information is periodically destroyed, for example, due to context switches
  • Keywords
    computer architecture; performance evaluation; program diagnostics; branch correlation; branch instruction; conditional branches; context switches; equivalent hardware cost; instruction traces; integer benchmark programs; path-based correlation; performance; Cost function; Hardware; History; Out of order; Pipelines; Program processors; Registers; Switches; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microarchitecture, 1995., Proceedings of the 28th Annual International Symposium on
  • Conference_Location
    Ann Arbor, MI
  • ISSN
    1072-4451
  • Print_ISBN
    0-8186-7349-4
  • Type

    conf

  • DOI
    10.1109/MICRO.1995.476809
  • Filename
    476809