• DocumentCode
    2533237
  • Title

    The M-Machine multicomputer

  • Author

    Fillo, Marco ; Keckler, Stephen W. ; Dally, William J. ; Carter, Nicholas P. ; Chang, Andrew ; Gurevich, Yevgeny ; Lee, Whay S.

  • Author_Institution
    Lab. for Comput. Sci., MIT, Cambridge, MA, USA
  • fYear
    1995
  • fDate
    29 Nov-1 Dec 1995
  • Firstpage
    146
  • Lastpage
    156
  • Abstract
    The M-Machine is an experimental multicomputer being developed to test architectural concepts motivated by the constraints of modern semiconductor technology and the demands of programming systems. The M-Machine computing nodes are connected with a 3-D mesh network; each node is a multithreaded processor incorporating 12 function units, on-chip cache, and local memory. The multiple function units are used to exploit both instruction-level and thread-level parallelism. A user accessible message passing system yields fast communication and synchronization between nodes. Rapid access to remote memory is provided transparently to the user with a combination of hardware and software mechanisms. This paper presents the architecture of the M-Machine and describes how its mechanisms attempt to maximize both single thread performance and overall system throughput. The architecture is complete and the MAP chip, which will serve as the M-Machine processing node, is currently being implemented
  • Keywords
    computer architecture; message passing; multiprocessing systems; synchronisation; 3-D mesh network; M-Machine multicomputer; architectural concepts testing; hardware mechanisms; instruction-level; local memory; multithreaded processor; on-chip cache; overall system throughput; programming systems; single thread performance; software mechanisms; thread-level parallelism; user accessible message passing system; Computer architecture; Computer networks; Hardware; Mesh networks; Message passing; Network-on-a-chip; Parallel processing; Semiconductor device testing; System testing; Yarn;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microarchitecture, 1995., Proceedings of the 28th Annual International Symposium on
  • Conference_Location
    Ann Arbor, MI
  • ISSN
    1072-4451
  • Print_ISBN
    0-8186-7349-4
  • Type

    conf

  • DOI
    10.1109/MICRO.1995.476822
  • Filename
    476822