Voltage dependent gate capacitance and its impact in estimating power and delay of CMOS digital circuits with low supply voltage

Gate capacitance has complex voltage dependency on terminal voltages but the impact of this voltage dependency of gate capacitance on power and delay has not been fully investigated, especially, in low-voltage, low-power designs. Introducing an effective gate capacitance, C_G,eff it is shown that the power and delay of CMOS digital circuit can be estimated accurately. C_G,eff is a strong function of V_TH/V_DD and V_TH/V_DD tends to increase in low-voltage region. Hence, the effective capacitance relative to oxide capacitance, C_OX, is decreasing in low-voltage, low-power designs. Therefore, considering C_G,eff in accurate power and delay estimation becomes more important in the future.