DocumentCode
2533885
Title
Design and performance analysis of a novel nanoscale associative memory
Author
Davis, Bryan A. ; Principe, José C. ; Fortes, José A B
Author_Institution
Dept. of Electr. & Comput. Eng., Florida Univ., Gainesville, FL, USA
fYear
2004
fDate
16-19 Aug. 2004
Firstpage
314
Lastpage
316
Abstract
This paper proposes a nanoscale associative memory architecture. The type of associative memory considered is adept at handling the irregular patterning of nanoscale components but requires an encoding scheme to be useful. We show how a randomly configured interface between the micro and nano scales can accomplish this encoding. The resulting associative memory eliminates some of the supporting microscale components required by the original crossbar architecture at the cost of reduced storage capacity. If the projections made by Kuekes et al. about the potential size of their memory prove correct, this associative memory configuration may be a valuable alternative.
Keywords
content-addressable storage; encoding; integrated circuit design; memory architecture; nanoelectronics; nanopatterning; crossbar architecture; encoding; microscale components; nanopatterning; nanoscale associative memory architecture; nanoscale associative memory design; nanoscale associative memory performance analysis; nanoscale components; reduced storage capacity; Associative memory; Computer architecture; Encoding; Integrated circuit interconnections; Memory architecture; Nanotechnology; Nanowires; Performance analysis; Random access memory; Read-write memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Nanotechnology, 2004. 4th IEEE Conference on
Print_ISBN
0-7803-8536-5
Type
conf
DOI
10.1109/NANO.2004.1392336
Filename
1392336
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