Timing-constrained yield-driven wire sizing for critical area minimization

In this paper, given a rectilinear Steiner tree (RST) with a source and a set of sinks, it is assumed that any sink in the RST has its timing constraint. Based on the concept of timing-consistent wire widening for any wire segment, the width of any wire segment may be replaced with its timing-consistent width without destroying the timing constraint of any sink. Furthermore, according to a given particle defect size, the widths of all the wire segments are reassigned to minimize total critical area of the RST by running a timing-constrained wire sizing process. The experimental results show that our proposed timing-constrained yield-driven wire sizing (TYWS) approach increase about 50% routing area to reduce 80%~90% critical area for the tested routing nets