Title :
Low power DSP´s for wireless communications
Author :
Verbauwhede, Ingrid ; Nicol, Chris
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
Abstract :
Wireless communications and more specifically, the fast growing penetration of cellular phones and cellular infrastructure are the major drivers for the development of new programmable Digital Signal Processors (DSP´s). In this tutorial, an overview is given of recent developments in DSP processor architectures, that makes them well suited to execute computationally intensive algorithms typically found in communications systems. DSP processors have adapted instruction sets, memory architectures and data paths to execute compute intensive communications algorithms efficiently and in a low power fashion. Basic building blocks include convolutional decoders (mainly the Viterbi algorithm), turbo coding algorithms, FIR filters, speech coders, etc. This is illustrated with examples of different commercial and research processors.
Keywords :
FIR filters; Viterbi decoding; digital filters; digital signal processing chips; low-power electronics; programmable circuits; radio equipment; radiocommunication; telecommunication computing; DSP processor architectures; FIR filters; Viterbi algorithm; adapted instruction sets; communications systems; computationally intensive algorithms; convolutional decoders; data paths; digital signal processors; low power DSP; memory architectures; programmable DSPs; speech coders; turbo coding algorithms; wireless communications; Cellular phones; Computer aided instruction; Computer architecture; Convolutional codes; Digital signal processing; Digital signal processors; Instruction sets; Memory architecture; Signal processing algorithms; Wireless communication;
Conference_Titel :
Low Power Electronics and Design, 2000. ISLPED '00. Proceedings of the 2000 International Symposium on
Print_ISBN :
1-58113-190-9
DOI :
10.1109/LPE.2000.155303