DocumentCode
2534154
Title
An Energy Efficient Secure Logic to Provide Resistance against Differential Power Analysis Attacks
Author
Sana, Pradeep Kumar ; Satyam, M.
Author_Institution
Center for VLSI & Embedded Syst. Technol., Int. Inst. of Inf. Technol., Hyderabad, India
fYear
2010
fDate
20-22 Dec. 2010
Firstpage
61
Lastpage
65
Abstract
In this article, we propose a new logic style which is resistant to Differential Power Analysis (DPA) attacks as well as energy efficient, to provide security to devices like smart cards. The main drawback in the existing secure logic styles was the high power consumption which is reduced significantly by using adiabatic approach. Dual-rail logic is used to maintain security and adiabatic logic is combined with it to reduce the power consumption. These ideas are implemented using Hspice tool, a significant improvement in power consumption and resistance against DPA attacks are observed when compared to the existing logic styles.
Keywords
electric resistance; logic circuits; Hspice tool; adiabatic approach; adiabatic logic; differential power analysis attack; dual-rail logic; energy efficient secure logic; power consumption; smart card; Clocks; Inverters; Power demand; Resistance; Security; Transistors; DPA attack; adiabatic circuits; dual-rail logic; low power; power attacks; secure circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic System Design (ISED), 2010 International Symposium on
Conference_Location
Bhubaneswar
Print_ISBN
978-1-4244-8979-4
Electronic_ISBN
978-0-7695-4294-2
Type
conf
DOI
10.1109/ISED.2010.20
Filename
5715150
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