• DocumentCode
    2534233
  • Title

    On Better Performance from Scheduling Threads According to Resource Demands in MMMP

  • Author

    Weng, Lichen ; Liu, Chen

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Florida Int. Univ., Miami, FL, USA
  • fYear
    2010
  • fDate
    13-16 Sept. 2010
  • Firstpage
    339
  • Lastpage
    345
  • Abstract
    The Multi-core Multi-threading Microprocessor introduces not only resource sharing to threads in the same core, e.g., computation resources and private caches, but also isolates those resources within different cores. Moreover, when the Simultaneous Multithreading architecture is employed, the execution resources are fully shared among the concurrently executing threads in the same core, while the isolation is worsened as the number of cores increases. Even though fetch policies regarding how to assign priorities in fetch stage are well designed to manage the shared resources in a core, it is actually the scheduling policy that makes the distributed resources available for workloads, through deciding how to send their threads to cores. On the other hand, threads consume various resources in different phases and Cycles Per Instruction Spent on Memory (CPImem) is used to express their resource demands. Consequently, aiming at better performance via scheduling according to their resource demands, we propose the Mix-Scheduling to evenly mix threads across cores, so that it achieves thread diversity, i.e., CPImem diversity in every core. As a result, it is observed in our experiment that 63% improvement in overall system throughput and 27% improvement in average thread performance, when comparing the Mix-Scheduling policy with the reference policy Mono-Scheduling, which keeps CPImem uniformity among threads in every core on chips. Furthermore, the Mix-Scheduling also makes an essential step towards shortening load latency, because it succeeds in reducing the L2 Cache Miss Rate by 6% from Mono-Scheduling.
  • Keywords
    microprocessor chips; multi-threading; processor scheduling; CPImem; L2 cache miss rate; MMMP; cycle per instruction spent on memory; distributed resources; mix-scheduling policy; multicore multithreading microprocessor; private caches; reference policy mono-scheduling; resource sharing; simultaneous multithreading architecture; thread scheduling; Benchmark testing; Computer architecture; Instruction sets; Message systems; Processor scheduling; Resource management; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel Processing Workshops (ICPPW), 2010 39th International Conference on
  • Conference_Location
    San Diego, CA
  • ISSN
    1530-2016
  • Print_ISBN
    978-1-4244-7918-4
  • Electronic_ISBN
    1530-2016
  • Type

    conf

  • DOI
    10.1109/ICPPW.2010.53
  • Filename
    5599091