DocumentCode :
2534266
Title :
Effect of Border Traps on Electron Mobility of Nano-Scale MOS Devices
Author :
Rathod, S.S. ; Saxena, Alok Kumar ; Dasgupta, S.
Author_Institution :
Electron. & Comput. Eng., Indian Inst. of Technol. Roorkee, Roorkee, India
fYear :
2010
fDate :
20-22 Dec. 2010
Firstpage :
91
Lastpage :
94
Abstract :
It has been recently identified that the near-interfacial oxide trap called `border trap´ can strongly affect the radiation response and long term reliability of irradiated MOS devices. But the existing mobility models used to compute radiation induced mobility degradation does not include border traps. Also the quantum mechanical structural confinement plays an important role in the reliability of MOS devices. The aim of this paper is to develop analytical model that accurately predicts mobility of the extremely small silicon thickness MOS devices placed under the radiation. The developed model includes surface roughness, surface mode optical phonon scattering, scattering due to silicon thickness fluctuations and phonon scattering with structural confinements and also the effect of border traps apart from interface and oxide traps. The reported experimental data is extrapolated for the nano-scale devices. From this data, mobility of the irradiated MOSFETs is computed using the developed expression. The results obtained are compared with Sentaurus TCAD simulations and also against numerous reported experimental results. A close match between the developed model, TCAD simulation results and experimental results validate our approach. The study undertaken would help to accurately estimate the radiation induced mobility degradation in MOS devices.
Keywords :
MIS devices; MOSFET; electron mobility; semiconductor device models; MOSFET; Sentaurus TCAD simulation; border trap effect; electron mobility; mobility degradation; nanoscale MOS device; near-interfacial oxide trap; quantum mechanical structural confinement; radiation response; silicon thickness fluctuation; surface mode optical phonon scattering; surface roughness; Computational modeling; Degradation; Logic gates; MOS devices; Nanoscale devices; Silicon; Threshold voltage; MOS; Modeling; Radiation; Simulation; Traps;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic System Design (ISED), 2010 International Symposium on
Conference_Location :
Bhubaneswar
Print_ISBN :
978-1-4244-8979-4
Electronic_ISBN :
978-0-7695-4294-2
Type :
conf
DOI :
10.1109/ISED.2010.26
Filename :
5715156
Link To Document :
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