Substrate bias voltage generator controlled by CMOS inverter

Author

Saitoh, Shin´ichi ; Tangsrirat, Worapong ; Suzuki, Yasoji ; Yoshida, Masahiro ; Teramoto, Mitsuo ; Yamaguchi, Akira

Author_Institution

Dept. of Commun. Eng., Tokai Univ., Kanagawa, Japan

fYear

1998

fDate

24-27 Nov 1998

Firstpage

279

Lastpage

282

Abstract

By controlling the MOSFET´s threshold voltage, power reduction in CMOS VLSIs can be achieved while the operating speed of the circuits is maintained. In this paper, we propose an efficient substrate bias voltage generator with a charge-pumping circuit driven by CMOS inverters for threshold voltage control of MOSFETs. The substrate bias voltage generator can generate negative voltage of -V_DD level without threshold voltage loss of MOS transistors. The operating characteristics of the generator are also analyzed in detail by using the circuit analysis program H-SPICE

Keywords

CMOS logic circuits; VLSI; low-power electronics; voltage control; CMOS VLSI circuits; CMOS inverter; CMOS logic ICs; H-SPICE; MOSFET threshold voltage; charge-pumping circuit; low power supply voltage; operating characteristics analysis; power reduction; substrate bias voltage generator; threshold voltage control; Charge pumps; Circuits; Inverters; Large scale integration; MOSFETs; Power dissipation; Power supplies; Threshold voltage; Very large scale integration; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1998. IEEE APCCAS 1998. The 1998 IEEE Asia-Pacific Conference on

Conference_Location

Chiangmai

Print_ISBN

0-7803-5146-0

Type

conf

DOI

10.1109/APCCAS.1998.743745

Filename

743745