DocumentCode
2534691
Title
Optimal Reversible Logic Circuit Synthesis Based on a Hybrid DFS-BFS Technique
Author
Kole, Dipak K. ; Rahaman, Hafizur ; Das, Debesh K. ; Bhattacharya, Bhargab B.
Author_Institution
Inf. Technol. Dept., Bengal Eng. & Sci. Univ., Howrah, India
fYear
2010
fDate
20-22 Dec. 2010
Firstpage
208
Lastpage
212
Abstract
Logic synthesis with reversible circuits has received considerable interest in the light of advances recently made in quantum computation. In this paper, we propose an improved technique for synthesizing reversible circuits based on a combined depth-first search (DFS) and breadth-first search (BFS) algorithm. A method based on DFS alone may often take a long time to converge, whereas, a BFS based method requires a large amount of memory for designing a circuit of moderate complexity. To strike a balance between these two approaches, we propose a hybrid DFS-BFS based synthesis algorithm that reduces the computation time compared to the DFS method and requires less space compared to the BFS method, while optimizing the cost of the circuit. Synthesis results on several reversible benchmark circuits have been reported.
Keywords
logic circuits; network synthesis; tree searching; BFS algorithm; DFS algorithm; breadth-first search algorithm; depth-first search algorithm; hybrid DFS-BFS technique; optimal reversible logic circuit synthesis; quantum computation; reversible benchmark circuit; Algorithm design and analysis; Arrays; Design automation; Heuristic algorithms; Logic circuits; Logic gates; Quantum computing; BFS; DFS; Reversible synthesis; Toffoli gate; permutation; reversible circuit;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic System Design (ISED), 2010 International Symposium on
Conference_Location
Bhubaneswar
Print_ISBN
978-1-4244-8979-4
Electronic_ISBN
978-0-7695-4294-2
Type
conf
DOI
10.1109/ISED.2010.47
Filename
5715177
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