Title :
A computer algorithm for AND-ExOR PLAs with k-bit decoders
Author :
Khuwaja, G.A. ; Abu-Rezq, A.N.
Author_Institution :
Dept. of Phys., Kuwait Univ., Safat, Kuwait
Abstract :
A computer algorithm which attempts to find the optimal modulo-2 factorized expression based on tabulation method is devised. This is a general algorithm to simplify switching functions (both Boolean and Reed-Muller) for the implementation of PLAs (both AND-OR and AND-ExOR) using k-bit maxterm decoders; 1⩽k⩽n/2 where n is the number of input variables. A maxterm decoder is a device which has k-inputs and p=2k outputs such that for each input combination 2k -1 outputs are active
Keywords :
VLSI; circuit CAD; decoding; integrated circuit design; logic CAD; programmable logic arrays; switching functions; AND-EXOR PLAs; AND-OR PLAs; Boolean functions; Reed-Muller functions; computer algorithm; k-bit decoders; maxterm decoders; optimal modulo-2 factorized expression; switching functions; tabulation method; Circuits; Costs; Decoding; Design engineering; Hamming distance; Input variables; Large scale integration; Logic testing; Physics; Programmable logic arrays;
Conference_Titel :
Circuits and Systems, 1998. IEEE APCCAS 1998. The 1998 IEEE Asia-Pacific Conference on
Conference_Location :
Chiangmai
Print_ISBN :
0-7803-5146-0
DOI :
10.1109/APCCAS.1998.743782
