Title :
A two-level redundancy scheme for enhancing scalability of molecular-based crossbar memories
Author :
Choi, Yoon-Hwa ; Lee, Myeong-Hyeon ; Kim, Young Kwan
Author_Institution :
Dept. of Comput. Eng., Hongik Univ., Seoul, South Korea
Abstract :
This paper presents a two-level redundancy scheme for enhancing scalability of molecular-based crossbar memories. It is based on multiple molecular memory modules with spares and address translation to cope with the expected high rate of defects in chemically fabricated nanocircuits. Molecular crossbars on top of a silicon-based die providing address translation demonstrate a notable improvement in scalability of defect-prone molecular memories.
Keywords :
elemental semiconductors; memory architecture; molecular electronics; redundancy; silicon; storage allocation; Si; address translation; chemically fabricated nanocircuit defects; defect prone molecular memories; molecular based crossbar memory scalability; multiple molecular memory modules; silicon based die; two-level redundancy method; Assembly; CMOS logic circuits; CMOS memory circuits; CMOS technology; Chemical technology; Fabrication; Molecular electronics; Nanowires; Redundancy; Scalability;
Conference_Titel :
Nanotechnology, 2004. 4th IEEE Conference on
Print_ISBN :
0-7803-8536-5
DOI :
10.1109/NANO.2004.1392401