DocumentCode :
2536306
Title :
Effective electrostatic discharge protection circuit design using novel full-silicided N-MOSFETs in sub-100 nm era
Author :
Lee, Jam-Wem ; Li, Yiming ; Tang, Howard
Author_Institution :
Dept. of Comput. Nanoelectron., Nat. Nano Device Labs., Taiwan
fYear :
2004
fDate :
16-19 Aug. 2004
Firstpage :
605
Lastpage :
607
Abstract :
In this paper, the floating charge effect is considered in the design of new full-silicided NMOSFETs for designing electrostatic discharge (ESD) protection nanocircuit. The new full-silicided ESD protection devices are designed, fabricated, and studied; our investigation demonstrates significantly the improvement of sustaining ESD robustness than that of the conventional full-silicided device. Furthermore, it has an excellent electrical efficiency than those of drain ballast resistor tied devices. Moreover, our novel design avoid the unexpected floating charge effects during the normally operation conditions.
Keywords :
MOSFET; electrostatic discharge; nanotechnology; 100 nm; ESD robustness; electrical efficiency; electrostatic discharge protection nanocircuit design; floating charge effect; full-silicided N-MOSFET; Circuit simulation; Circuit synthesis; Electronic ballasts; Electrostatic discharge; MOSFET circuits; Microelectronics; Poisson equations; Protection; Resistors; Semiconductor devices;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nanotechnology, 2004. 4th IEEE Conference on
Print_ISBN :
0-7803-8536-5
Type :
conf
DOI :
10.1109/NANO.2004.1392434
Filename :
1392434
Link To Document :
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