DocumentCode :
2536886
Title :
A low power LNA using miniature 3D inductor without area penalty of passive components
Author :
Tanabe, Akira ; Hijioka, Ken´ichiro ; Nagase, Hirokazu ; Hayashi, Yoshihiro
Author_Institution :
LSI Fundamental Res. Lab., NEC Electron. Corp., Sagamihara, Japan
fYear :
2010
fDate :
23-25 May 2010
Firstpage :
315
Lastpage :
318
Abstract :
A low power 5GHz LNA without area penalty of inductors has been fabricated. Because of a miniature 3D vertical solenoid inductor, a chip area of this LNA is as small as that of feedback type LNAs which do not need passive components. A noise and a power consumption are smaller than those LNAs. Because of a small parasitic capacitance of the 3D inductor and a controlled series resistance considering skin and proximity effects, a 15.7dB power gain and a 2.0dB noise factor at 5GHz have been achieved with only 3.6mW power consumption. This LNA with the miniature 3D solenoid inductor is preferable for low power and low cost RF/mixed-signal SoCs.
Keywords :
inductors; low noise amplifiers; low-power electronics; frequency 5 GHz; gain 15.7 dB; low power LNA; miniature 3D inductor; miniature 3D vertical solenoid inductor; noise figure 2.0 dB; parasitic capacitance; passive component; power 3.6 mW; Circuit noise; Energy consumption; Feedback circuits; Inductors; MOSFETs; Metalworking machines; Parasitic capacitance; Radio frequency; Solenoids; Wire; CMOS; Inductor; LNA; Noise;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio Frequency Integrated Circuits Symposium (RFIC), 2010 IEEE
Conference_Location :
Anaheim, CA
ISSN :
1529-2517
Print_ISBN :
978-1-4244-6240-7
Type :
conf
DOI :
10.1109/RFIC.2010.5477252
Filename :
5477252
Link To Document :
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