DocumentCode
2537020
Title
Controlled dither in 90 nm digital to time conversion based direct digital synthesizer for spur mitigation
Author
Talwalkar, S. ; Gradishar, T. ; Stengel, B. ; Cafaro, G. ; Nagaraj, G.
Author_Institution
Motorola Inc., Plantation, FL, USA
fYear
2010
fDate
23-25 May 2010
Firstpage
549
Lastpage
552
Abstract
Dithering is used in many discrete to continuous value conversion functions to provide an effective fractional value. This paper reviews the application of dither to a digital-to-time converter (DTC) based digital synthesizer suitable for many common wireless communication systems. Measurements of a 90 nm CMOS implementation using a 5 bit DTC show extension to effective 8 bits.
Keywords
CMOS integrated circuits; convertors; direct digital synthesis; CMOS implementation; digital to time conversion; direct digital synthesizer; size 90 nm; spur mitigation; wireless communication systems; Chromium; Clocks; Delay effects; Error correction; Frequency synthesizers; Logic; Multiplexing; Propagation delay; Quantization; Wireless communication; Delay Line; Digital to Time Conversion; Direct Digital Synthesis; Dither; Fractional Delay; Spur Mitigation;
fLanguage
English
Publisher
ieee
Conference_Titel
Radio Frequency Integrated Circuits Symposium (RFIC), 2010 IEEE
Conference_Location
Anaheim, CA
ISSN
1529-2517
Print_ISBN
978-1-4244-6240-7
Type
conf
DOI
10.1109/RFIC.2010.5477259
Filename
5477259
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