Progress on the prototype PIPE

This paper summarizes our first experience with the prototype Pipelined Image Processing Engine (PIPE) at the National Bureau of Standards during the Summer of 1986. The PIPE machine is a multistage, pipelined configuration of video-rate hardware with a fairly flexible interconnect structure which can be dynamically reconfigured at TV-field rate (60 fields/sec). It is essentially a special-purpose integer processor, tailored to the needs of early vision computations. As the PIPE is a synchronized MIMD machine, the design and programming of algorithms is best done in the form of Data-Flow Graphs which are mapped onto Space-Time Diagrams of the machine. It took us roughly three days to learn to design, implement and debug a program for the PIPE. We have created a variety of routines for real-time image processing; examples are described here, along with algorithm diagrams, latency and update rates.