A low power (45mW/latch) static 150GHz CML divider

Author

Hitko, Donald A. ; Hussain, T. ; Jensen, Joseph F. ; Royter, Yakov ; Morton, Susan L. ; Matthews, David S. ; Rajavel, Rajesh D. ; Milosavljevlc, I. ; Fields, Charles H. ; Thomas, Stephen ; Kurdoghllan, A. ; Lao, Zhihao ; Elliott, Kenneth ; Sokolich, M.

Author_Institution

HRL Labs., LLC, Malibu, CA, USA

fYear

2004

fDate

24-27 Oct. 2004

Firstpage

167

Lastpage

170

Abstract

Operation of a static, current mode logic (CML) frequency divider to clock frequencies exceeding 150GHz is reported. The divide-by-8 circuit described here has been realized in a highly scaled 0.4/spl mu/m InP/InGaAs/InP DHBT technology, dissipates only 45mW per latch, and achieves this using purely resistive loads. Thermal limitations in device performance are observed to play a key role, demonstrating the need for aggressive heat management in high speed technologies. On a full thickness wafer in a 27/spl deg/C ambient, the maximum operating frequency of the divider was 143.6GHz; this range extended to 151.2GHz when an air flow at -30/spl deg/C was established across the wafer.

Keywords

III-V semiconductors; bipolar logic circuits; clocks; current-mode logic; frequency dividers; gallium arsenide; heterojunction bipolar transistors; indium compounds; low-power electronics; -30 C; 0.4 micron; 143.6 GHz; 150 GHz; 151.2 GHz; 27 C; 45 mW; InP-InGaAs-InP; InP/InGaAs/InP DHBT technology; air flow; clock frequencies; current mode logic frequency divider; device performance; heat management; high speed technologies; resistive loads; thermal limitations; Circuits; Clocks; DH-HEMTs; Frequency conversion; Indium gallium arsenide; Indium phosphide; Latches; Logic devices; Technology management; Thermal management;

fLanguage

English

Publisher

ieee

Conference_Titel

Compound Semiconductor Integrated Circuit Symposium, 2004. IEEE

Conference_Location

Monterey, CA, USA

ISSN

1550-8781

Print_ISBN

0-7803-8616-7

Type

conf

DOI

10.1109/CSICS.2004.1392523

Filename

1392523