A CMOS wide-bandwidth high-power linear-in-dB variable attenuator using body voltage distribution method

Author

Huang, Yan-Yu ; Woo, Wangmyong ; Lee, Chang-Ho ; Laskar, Joy

Author_Institution

Georgia Electron. Design Center, Georgia Inst. of Technol., Atlanta, GA, USA

fYear

2010

fDate

23-25 May 2010

Firstpage

303

Lastpage

306

Abstract

A wide bandwidth, highly linear variable attenuator designed in 0.18 μm triple-well CMOS process is presented. This attenuator is based on three cascade π-networks with body voltage distribution scheme to minimize the effects of the input power levels. Measurements show it achieves minimum 1-dB gain compression of 7.5 dBm. The mid-band insertion loss is 1.6 dB and the maximum attenuation is 34.8 dB. This attenuator has a linear-in-dB controllability from 400 MHz to 3.7 GHz with input return loss better than 9 dB. To our knowledge, this is the highest linear CMOS variable attenuator with a wide bandwidth of 3.3 GHz.

Keywords

CMOS integrated circuits; attenuators; CMOS wide-bandwidth high-power linear-in-dB variable attenuator; body voltage distribution method; cascade π-networks; frequency 400 MHz to 3.7 GHz; highly linear variable attenuator; mid-band insertion loss; size 0.18 mum; triple-well CMOS process; Attenuation; Attenuators; Bandwidth; CMOS process; CMOS technology; Circuits; Impedance; Linearity; Resistors; Voltage; CMOS; attenuator; body voltage swing distribution; body-floating technique; linear-in-dB;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits Symposium (RFIC), 2010 IEEE

Conference_Location

Anaheim, CA

ISSN

1529-2517

Print_ISBN

978-1-4244-6240-7

Type

conf

DOI

10.1109/RFIC.2010.5477366

Filename

5477366