DocumentCode
2539372
Title
New Architecture for MHz Switching Frequency PFC
Author
Wang, Chuanyun ; Xu, Ming ; Lu, Bing ; Lee, Fred C.
Author_Institution
Center for Power Electronics Systems, Virginia Polytechnic Institute and State University, Blacksburg, VA 24061 USA
fYear
2007
fDate
Feb. 25 2007-March 1 2007
Firstpage
179
Lastpage
185
Abstract
In this paper, the concept of high frequency operation to shrink the EMI filter and inductor size in the PFC circuit is demonstrated. A 600 kHz single switch CCM boost PFC with 92% full load efficiency at 90 VAC input is developed with the Infineon newly developed CoolMOS and SiC diode devices. Both the EMI filter and the inductor size are greatly reduced. Further more, a new two-stage PFC architecture is introduced. This enables the PFC to run at 1 MHz with 92.8% full load efficiency. At such high operating frequency, the EMI filter and inductor size is further reduced. For the second stage in this structure, a high efficiency, and high power density voltage doubler is proposed. The measured full load efficiency of the voltage doubler prototype is 99%. Interleaving multi-phase high frequency PFC architecture is also introduced. The ability to reduce the EMI filter size by increase the EMI noise frequency is discussed and demonstrated.
Keywords
Circuits; Diodes; Electromagnetic interference; Filters; Inductors; Prototypes; Silicon carbide; Switches; Switching frequency; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Applied Power Electronics Conference, APEC 2007 - Twenty Second Annual IEEE
Conference_Location
Anaheim, CA, USA
ISSN
1048-2334
Print_ISBN
1-4244-0713-3
Type
conf
DOI
10.1109/APEX.2007.357512
Filename
4195716
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