A linearity-enhanced wideband low-noise amplifier

Author

Choi, Kihwa ; Mukherjee, Tamal ; Paramesh, Jeyanandh

Author_Institution

Telecommun. Syst. Div., Samsung Electron., Suwon, South Korea

fYear

2010

fDate

23-25 May 2010

Firstpage

127

Lastpage

130

Abstract

Techniques are proposed to enhance linearity in a low-voltage wideband LNA for use in a multi-standard wideband receiver. To achieve high linearity over wide frequency range, two previous IMD₃ cancellation techniques are merged and modified to obtain IIP3 peaks at different frequencies, while minimizing component count. A self-biasing current reuse technique is developed to enhance low-voltage operation. Two LNAs are designed in 0.13 μm CMOS to demonstrate these techniques: the (Chebyshev, transformer) LNAs achieved (+10.6, +12.0) dBm IIP3 over (2.3-6.0, 2.0-5.3) GHz, (12.7, 12.4) dB gain, (4.8, 4.9) dB noise figure, while consuming 6.9mA from 1.2V.

Keywords

CMOS integrated circuits; low noise amplifiers; CMOS; IIP3 peaks; IMD3 cancellation technique; current 6.9 mA; linearity-enhanced wideband low-noise amplifier; low-voltage wideband LNA; multistandard wideband receiver; self-biasing current reuse technique; size 0.13 mum; voltage 1.2 V; Bandwidth; CMOS process; Chebyshev approximation; Circuit topology; Frequency; Impedance matching; Linearity; Low-noise amplifiers; Voltage; Wideband;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits Symposium (RFIC), 2010 IEEE

Conference_Location

Anaheim, CA

ISSN

1529-2517

Print_ISBN

978-1-4244-6240-7

Type

conf

DOI

10.1109/RFIC.2010.5477379

Filename

5477379