DocumentCode :
2539663
Title :
Charge-pump reducing current mismatch in DLLs and PLLs
Author :
Ha, Kyung-Soo ; Kim, Lee-Sup
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., KAIST, Daejeon
fYear :
2006
fDate :
21-24 May 2006
Abstract :
Conventional CMOS charge-pump circuits have some current mismatch problems. The current mismatch induces a phase offset which deteriorates the performance of PLLs or DLLs. This paper investigates causes of current mismatch of conventional CMOS charge-pump and proposes new charge-pump circuits to reduce the current mismatch. The DLL with proposed charge-pump is simulated in a 0.18 mum CMOS process
Keywords :
CMOS integrated circuits; circuit simulation; delay lock loops; phase locked loops; 0.18 micron; CMOS integrated circuit; DLL; PLL; charge-pump circuits; circuit simulation; current mismatch reduction; delay lock loop; phase locked loops; CMOS process; Charge pumps; Circuit simulation; Clocks; Delay; Intrusion detection; MOS devices; Phase detection; Phase locked loops; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location :
Island of Kos
Print_ISBN :
0-7803-9389-9
Type :
conf
DOI :
10.1109/ISCAS.2006.1693061
Filename :
1693061
Link To Document :
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